This invention relates, in general, to semiconductor devices, and more particularly to a method of making external contact to a semiconductor die.
External contact is often made to semiconductor dice by methods such as tape automated bonding (TAB). Typically, the internal metallization of a semiconductor die is coupled to a bond pad or bump on the outer periphery of the semiconductor die surface. The bond pads or bumps are generally made of compressible metal so that external contact means such as the leads of a lead frame may be press-fit therein. TAB bonding eliminates the need for troublesome wire bonding.
Many high powered semiconductor dice such as those including emitter coupled logic (ECL) circuits having upwards of 50,000 gates and power upwards of 70 watts on a single chip often employ TAB bonding. For example, an ECL circuit fabricated by Motorola's MOSAIC IV process technology includes four metal layers selectively coupled by via interconnect technology. The top metal layer is a power bus layer that couples external power sources to the internal logic elements. The power bus layer is coupled to the external power sources through bond pads or bumps as described above.
Many problems are prevalent when conventional TAB bonding methods are used to externally contact high powered semiconductor dice. For example, large amounts of current demand power buses that are very substantial in size. To handle the desired current, the power buses are often too large for the die on which they are employed. Conversely, if these power buses are not large enough to meet current requirements, electromigration problems may occur throughout the power buses. The above problems are especially prevalent in those portions of the internal metallization that couple the actual power bus lines to the peripheral bond pads and bumps. Another common problem is the loss of voltage through bus drop. If the bus drop becomes too large, logic errors occur and cause the circuit to not function properly.
Accordingly, it would be highly desirable to develop a method of making external contact to a semiconductor die that allows for smaller power buses that will adequately handle high currents without electromigration deficiencies or detrimental bus drop.